半导体学报2003，Vol.24Issue(10)：1030-1034,5.
18μm CMOS工艺条件下的信号完整性分析
Signal Integrity for 0.18μm CMOS Technology
孙加兴 1叶青 1周玉梅 1叶甜春1
作者信息
- 1. 中国科学院微电子中心,北京,100029
- 折叠
摘要
Abstract
The signal integrity problem in 0.18μm CMOS technology is analyzed from simulation.Several rules in this phenomenon are found by analyzing the crosstalk delay and noise,which are helpful for the future circuit design.关键词
互连线延迟/信号完整性/串扰/噪声Key words
interconnect delay/signal integrity/crosstalk/noise分类
信息技术与安全科学引用本文复制引用
孙加兴,叶青,周玉梅,叶甜春..18μm CMOS工艺条件下的信号完整性分析[J].半导体学报,2003,24(10):1030-1034,5.
