半导体学报2003，Vol.24Issue(11)：1154-1158,5.
2.5GHz低相位噪声CMOS LC VCO的设计
Design of 2.5GHz Low Phase Noise CMOS LC-VCO
摘要
Abstract
A 2.5GHz fully integrated LC-VCO is fabricated in a standard single poly 4-metal 0.35μm digital CMOS process,using a complementary cross-coupled topology for lowering power dissipation and reducing the effect of 1/f noise.An on-chip LC filtering technique is used to lower the high frequency noise.Accumulation varactors are used to widen frequency tuning.The measured tuning range is 23 percent.A single hexadecagon symmetric on-chip spiral is used with grounded shield pattern to reduce the chip area and maximize the quality factor.A phase noise of -118dBc/Hz at 1MHz offset is measured.The power dissipation is 4mA at VDD=3.3V.关键词
2.5GHz LC VCO/相位噪声/增强型可变电容/片上集成螺旋电感Key words
2.5GHz LC-VCO/phase noise/accumulation varactors/on-chip spiral inductor分类
信息技术与安全科学引用本文复制引用
张海清,章倩苓..2.5GHz低相位噪声CMOS LC VCO的设计[J].半导体学报,2003,24(11):1154-1158,5.基金项目
国家高技术研究发展计划资助项目(编号:2002AA1Z1060) （编号:2002AA1Z1060）
