半导体学报2006，Vol.27Issue(7)：1164-1169,6.
一种新型节省芯片面积的数字插值滤波器的设计与实现
Design and Implementation of a Novel Area-Efficient Interpolator
摘要
Abstract
This paper presents the design considerations and implementation of an area-efficient interpolator suitable for a delta-sigma D/A converter. In an effort to reduce the area and design complexity, a method for designing an FIR filter as a tapped cascaded interconnection of identical subfilters is modified. The proposed subfilter structure further minimizes the arithmetic number. Experimental results show that the proposed interpolator achieves the design specification,exhibiting high performance and hardware efficiency,and also has good noise rejection capability. The interpolation filter can be applied to a delta-sigma DAC and is fully functional.关键词
过采样数模转换器/数字插值滤波器/半带滤波器Key words
delta-sigma digital-to-analog converter/interpolator/halfband filter分类
信息技术与安全科学引用本文复制引用
彭云峰,孔德睿,周锋..一种新型节省芯片面积的数字插值滤波器的设计与实现[J].半导体学报,2006,27(7):1164-1169,6.基金项目
Project supported by the National Natural Science Foundation of China(No. 90307008) 国家自然科学基金资助项目(批准号:90307008) （No. 90307008）
