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对基于DLL和PLL的射频CMOS振荡器的相位抖动比较

李金城 仇玉林

半导体学报2001,Vol.22Issue(10):1246-1249,4.
半导体学报2001,Vol.22Issue(10):1246-1249,4.

对基于DLL和PLL的射频CMOS振荡器的相位抖动比较

The Jitter Performance Comparison Between DLL and PLL-Based RF CMOS Oscillators

李金城 1仇玉林1

作者信息

  • 1. 中国科学院微电子中心,
  • 折叠

摘要

Abstract

By jitter performance comparison between PLL (Phase Locked Loop) and DLL (Delay Locked Loop), a helpful equation is derived for the structure choice between DLL and PLL-based synthesizers fabricated in CMOS processes to get an optimum jitter performance and power consumption. For a frequency synthesizer, a large multiple factor prefers PLL-based configuration which consumes less power, while a small one needs DLL-based topology which produces a better jitter performance.

关键词

相位抖动/PLL/延时锁相环/频率合成器/射频CMOS收发器/本振/压控延时线/压控振荡器

分类

信息技术与安全科学

引用本文复制引用

李金城,仇玉林..对基于DLL和PLL的射频CMOS振荡器的相位抖动比较[J].半导体学报,2001,22(10):1246-1249,4.

半导体学报

OA北大核心CSCD

1674-4926

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