半导体学报2009，Vol.30Issue(9)：135-138,4.DOI:10.1088/1674-4926/30/9/096001
Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer
Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer
Zhang Zhenlong 1Liu Xiangyang 1Mao Yanli1
作者信息
- 1. Institute of Optics and Photoelectronic Technology, School of Physics and Electronics, Henan University, Kaifeng 475004, China
- 折叠
摘要
Abstract
noise.关键词
planar patch-clamp substrate/silicon-on-insulator/access resistance/capacitanceKey words
planar patch-clamp substrate/silicon-on-insulator/access resistance/capacitance分类
信息技术与安全科学引用本文复制引用
Zhang Zhenlong,Liu Xiangyang,Mao Yanli..Design and fabrication of a planar patch-clamp substrate using a silicon-on-insulator wafer[J].半导体学报,2009,30(9):135-138,4.
