东南大学学报（英文版）2006，Vol.22Issue(1)：1-4,4.
一种低功耗的10 Gbit/s CMOS 1:4分接器
A kind of low-power 10 Gbit/s CMOS 1:4 demultiplexer
摘要
Abstract
A 10 Gbit/s 1: 4 demultiplexer(DEMUX) fabricated in 0. 18 μm CMOS (complementary metal-oxidesemiconductor transistor) technology for optical-fiber-link is presented. The system is constructed in tree-type structure and it includes a high-speed 1: 2 DEMUX, two low-speed 1: 2 DEMUXs, a divider, and input and output buffers for data and clock. To improve the circuit performance and reduce the power consumption, a latch structure with a common-gate topology and a single clock phase is employed in the high-speed 1: 2 DEMUX and the 5 GHz 1: 2 on-chip frequency divider, while dynamic CMOS logic is adopted in the low-speed 1: 2 DEMUXs. Measured results at 10 Gbit/s by 231 - 1 pseudo random bit sequences (PRBS) via on-wafer testing indicate that it can work well with a power dissipation of less than 100 mW at 1.8 V supply voltage. The die area of the DEMUX is 0. 65 mm × 0. 75 mm.关键词
光纤通信/CMOS/分接器/低功耗Key words
optical communication/CMOS/demultiplexer (DEMUX)/low-power分类
信息技术与安全科学引用本文复制引用
蒋俊洁,冯军,李有慧,胡庆生,熊明珍..一种低功耗的10 Gbit/s CMOS 1:4分接器[J].东南大学学报（英文版）,2006,22(1):1-4,4.基金项目
The National High Technology Research and Development Program of China (863 Program) (No. 2001AA312010). （863 Program）
