电子学报2001，Vol.29Issue(2)：164-167,4.
漂移区为线性掺杂的高压薄膜SOI器件的研制
Development of High Voltage Thin Film SOI Device with Linearly Doped Drift Region
张盛东 1Lai,Tommy1
作者信息
- 1. 北京大学微电子学研究所,北京 100871
- 折叠
摘要
Abstract
Principle and method for designing high voltage thin film SOIdevices with linearly doped drift region are given.LDMOS transistors are fabricated on the SOI wafers with Si film of 0.15μm and buried oxide of 2μm.The dependence of breakdown voltages of the thin film SOI devices on the concentration gradient in the linearly doped drift region is experimentally investigated for the first time.Based on the optimization of the impurity dose in drift region,the breakdown voltage over 612V is observed in the SOI LDMOS transistors with 50μm drift region.关键词
薄膜SOI/高压/LDMOS/线性掺杂分类
信息技术与安全科学引用本文复制引用
张盛东,Lai,Tommy..漂移区为线性掺杂的高压薄膜SOI器件的研制[J].电子学报,2001,29(2):164-167,4.
