半导体学报2007，Vol.28Issue(12)：1930-1936,7.
射频接收机中低抖动双模分频器
Low Jitter,Dual-Modulus Prescalers for RF Receivers
唐路 1王志功 1何小虎 1李智群 1徐勇 1李伟 2郭峰1
作者信息
- 1. 东南大学射频与光电集成电路研究所,南京,210096
- 2. 中国人民解放军理工大学理学院,南京,211101
- 折叠
摘要
Abstract
Dual-modulus prescalers (DMP) for RF receivers are studied.An improved D-latch is proposed to increase the speed and the driving capability of the DMP.A novel D-latch architecture integrated with 'OR' logic is proposed to decrease the complexity of the circuit.A divided-by-16/17 DMP for application in a digital video broadcasting-terrestrial receiver is realized with a TSMC 0.18μm mixed-signal CMOS process.The programmable & pulse swallow divider in this receiver is designed with a 0.18μm CMOS standard cell library and realized in the same process.The measured results show that the DMP has an output jitter of less than 0.03% and works well with the programmable & pulse swallow divider.关键词
锁相环/频率综合器/双模分频器/可编程脉冲吞吐式分频器Key words
PLL/frequency synthesizer/DMP/programmable & pulse swallow divider分类
信息技术与安全科学引用本文复制引用
唐路,王志功,何小虎,李智群,徐勇,李伟,郭峰..射频接收机中低抖动双模分频器[J].半导体学报,2007,28(12):1930-1936,7.
