半导体学报2008，Vol.29Issue(10)：1963-1967,5.
用于便携式GPS接收机中的5.4mW低噪声高增益CMOS射频前端电路设计
A 5.4mW Low-Noise High-Gain CMOS RF Front-End Circuit for Portable GPS Receivers
摘要
Abstract
This paper describes a CMOS low noise amplifier (LNA) plus the quadrature mixers intended for use in the front-end of portable global positioning system (GPS) receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gilbert cell type. The circuits are implemented in a TSMC 0.18tμm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise figure of 2.4dB,an input ldB compression point of-22dBm, and an input return loss of-22. 3dB. The fully differential circuits only draw 5.4mW from a 1.8V supply.关键词
CMOS射频集成电路/全球定位系统/低噪声放大器/混频器/接收机/噪声系数Key words
CMOS RF IC/GPS/low-noise amplifiers/mixers/receivers/noise figure分类
信息技术与安全科学引用本文复制引用
王良坤,马成炎,叶甜春..用于便携式GPS接收机中的5.4mW低噪声高增益CMOS射频前端电路设计[J].半导体学报,2008,29(10):1963-1967,5.基金项目
Project supported by the National High Technology Research and Development Program of China (No. 2007AA12Z344)国家高技术研究发展计划资助项目(批准号:2007AA122344) （No. 2007AA12Z344）
