电子器件2002，Vol.25Issue(4)：388-391,4.
一种用于低功耗BIST的多重抑制LFSR结构
A Multiple LFSR Inhibiting Structure for Low Power BIST
许舸夫 1张哲 1胡晨 1毛武晋 1刘锋1
作者信息
- 1. 东南大学国家专用集成电路系统工程中心,南京,210096
- 折叠
摘要
Abstract
In this paper, a multiple LFSR inhibiting structure is proposed to reduce the power consumption during BIST. The structure inhibits the non-detecting sub-sequences not by the vectors but by the distance numbers between the vectors. The average reduction of the internal WSA, which is used to estimate the power consumption, reaches 80.3%. Furthermore, with the increasing of inhibition times, that the area overhead increases more slowly than other filtering or inhibiting techniques is also an advantage of the proposed structure.关键词
BIST/多重抑制/距离数/分割Key words
BIST/multiple inhibiting/distance number/partition分类
信息技术与安全科学引用本文复制引用
许舸夫,张哲,胡晨,毛武晋,刘锋..一种用于低功耗BIST的多重抑制LFSR结构[J].电子器件,2002,25(4):388-391,4.
