半导体学报2009，Vol.30Issue(6)：51-56,6.DOI:10.1088/1674-4926/30/6/064002
Characteristics of vertical double-gate dual-strained-channel MOSFET
Characteristics of vertical double-gate dual-strained-channel MOSFET
摘要
Abstract
A novel device structure with a vertical double-gate and dual-strained channel is presented. The electrical characteristics of this device with a gate length of 100 nm are simulated. With a Ge content of 20%, the drain currents of the strained-Si NMOSFET and the strained-SiGe PMOSFET compared to the universal SOI MOSFETs are enhanced by 26% and 33%, respectively; the risetime and the falltime of the strained-channel CMOS are greatly decreased by 50% and 25.47% compared to their traditional Si channel counterparts. The simulation results show that the vertical double-gate (DG) dual-strained-channel MOSFETs exhibit better drive capability, a higher transconductance, and a faster circuit speed for CMOS compared to conventional-Si MOSFETs. The new structure can be achieved by today's semiconductor manufacturing level.关键词
vertical/double-gate/dual-strained-channelKey words
vertical/double-gate/dual-strained-channel分类
信息技术与安全科学引用本文复制引用
Gao Yong,Yang Jing,Yang Yuan,Liu Jing..Characteristics of vertical double-gate dual-strained-channel MOSFET[J].半导体学报,2009,30(6):51-56,6.基金项目
Project supported by the (Xi'an) Innovation Foundation for Applied Materials of USA (No. XA-AM-2008070 and the Education Bureau of Shannxi Province (No. 08JK384). （Xi'an）
