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CMOS射频集成电路ESD保护的挑战

王自惠 林琳 王昕 刘海南 周玉梅

半导体学报2008,Vol.29Issue(4):628-636,9.
半导体学报2008,Vol.29Issue(4):628-636,9.

CMOS射频集成电路ESD保护的挑战

Emerging Challenges in ESD Protection for RF ICs in CMOS

王自惠 1林琳 1王昕 1刘海南 2周玉梅2

作者信息

  • 1. Department of Electrical Engineering,University of California,Riverside,CA 92521,USA
  • 2. 中国科学院微电子研究所,北京,100029,中国
  • 折叠

摘要

Abstract

On-chip electrostatic discharge (ESD) protection design has become an emerging challenge for radio-frequency(RF) integrated circuits (IC) design as IC technologies migrate into the very-deep-sub-micron (VDSM) regime and RFICs move into multi-GHz operations. The key problem originates from the complex interaction between the ESD protec-tion circuitry and the core RF IC circuit under protection. This paper discusses the recent development in RF ESD protec-tion research and design,outlining emerging challenges,new design methods,and novel RF ESD protection solutions.

关键词

静电泄放/ESD保护/射频ESD/寄生效应

Key words

electrostatic discharge/ ESD protection/ RF ESD/ parasitic

分类

信息技术与安全科学

引用本文复制引用

王自惠,林琳,王昕,刘海南,周玉梅..CMOS射频集成电路ESD保护的挑战[J].半导体学报,2008,29(4):628-636,9.

基金项目

国家自然科学基金和CitrusCom Semiconductor资助项目 ()

Project supported by the National Natural Science Foundation of China and CitrusCom Semiconductor ()

半导体学报

OA北大核心CSCDCSTPCD

1674-4926

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