高技术通讯(英文版)2003,Vol.9Issue(2):65-67,3.
A 0.35μm CMOS 6.1GHz 1∶4 Static Frequency Divider
A 0.35μm CMOS 6.1GHz 1∶4 Static Frequency Divider
摘要
Abstract
A 1∶4 static frequency divider has been designed and realized in a 0.35-micron standard CMOS technology. The chip consists of two identical 1∶2 divider cells, which are based on SCL (Source Coupled Logic) flip-flops. By revising the traditional topology of SCL flip-flop, we get a divider with better performances. Measurement results show that the whole chip achieves the frequency division at more than 6GHz. Each 1∶2 divider consumes 11mW from a 3.3V supply. The divider can be used in RF and Optic-fiber Transceivers and other high-speed systems.关键词
frequency divider/flip-flop/CMOSKey words
frequency divider/flip-flop/CMOS分类
信息技术与安全科学引用本文复制引用
..A 0.35μm CMOS 6.1GHz 1∶4 Static Frequency Divider[J].高技术通讯(英文版),2003,9(2):65-67,3.基金项目
Supported by the High Technology Research and Devolopment Programme of China ()