半导体学报2009，Vol.30Issue(7)：89-93,5.DOI:10.1088/1674-4926/30/7/075003
A 3.96 GHz phase-locked loop for mode.1 MB-OFDM UWB hopping carrier generation
A 3.96 GHz phase-locked loop for mode.1 MB-OFDM UWB hopping carrier generation
摘要
Abstract
PLL achieves a phase noise of-70 dBc/Hz at 10 kHz offset and -113 dBc/Hz at 1 MHz offset. The integrated RMS jitter from 1 kHz to 10 MHz is 2.2 ps. The reference spur level is less than -68 dBc.关键词
phase-locked loop/adaptive frequency calibration/loop filter/CMOS/UWBKey words
phase-locked loop/adaptive frequency calibration/loop filter/CMOS/UWB引用本文复制引用
Zheng Yongzheng,Li Weinan,Xia Lingli,Huang Yumei,Hong Zhiliang..A 3.96 GHz phase-locked loop for mode.1 MB-OFDM UWB hopping carrier generation[J].半导体学报,2009,30(7):89-93,5.基金项目
Project supported by the National Natural Science Foundation of China (No. 60606009). （No. 60606009）
