A 3.96 GHz phase-locked loop for mode.1 MB-OFDM UWB hopping carrier generationOA北大核心CSCDCSTPCD
A 3.96 GHz phase-locked loop for mode.1 MB-OFDM UWB hopping carrier generation
PLL achieves a phase noise of-70 dBc/Hz at 10 kHz offset and -113 dBc/Hz at 1 MHz offset. The integrated RMS jitter from 1 kHz to 10 MHz is 2.2 ps. The reference spur level is less than -68 dBc.
PLL achieves a phase noise of-70 dBc/Hz at 10 kHz offset and -113 dBc/Hz at 1 MHz offset. The integrated RMS jitter from 1 kHz to 10 MHz is 2.2 ps. The reference spur level is less than -68 dBc.
Zheng Yongzheng;Li Weinan;Xia Lingli;Huang Yumei;Hong Zhiliang
State Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, ChinaState Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, ChinaState Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, ChinaState Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, ChinaState Key Laboratory of ASIC & System, Fudan University, Shanghai 201203, China
phase-locked loopadaptive frequency calibrationloop filterCMOSUWB
phase-locked loopadaptive frequency calibrationloop filterCMOSUWB
《半导体学报》 2009 (7)
基于多带－正交频分多路的超宽带射频接收电路关键技术的研究
89-93,5
Project supported by the National Natural Science Foundation of China (No. 60606009).
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