通信学报2009，Vol.30Issue(7)：91-98,8.
PDVQ图像压缩芯片的设计与实现
Design and implementation for partition dynamically vector quantization chip
摘要
Abstract
Partition dynamically vector quantization (PDVQ) chip was researched and produced to encode images. Be-fore encoding, it first judged the correlation of the encoding image block, and then decided to choose the size of the im-age blocks. Test result shows that PDVQ chip can improve the compression rate to 27% in average by contrasting with the normal VQ, even to 64%.The size of the codebook in PDVQ chip was 256×16 byte, and all codevectors in the code-book were categorized by direction, in each category codebook codewords were sorted in the ascending order of their sum, this kind codebook architecture could reduce search range largely. The VLSI architecture of PDVQ chip was im-plemented based on Charter 0.35μm CMOS standard cell technology, its chip area was 2.08mm×2.08mm. Test result shows that, at 3.0V power supply, PDVQ chip can operate up to 100MHz. At this operation,its power dissipation is 295mW, and it can support real-time encoding application for 512×512 gray images at 30fame/s.关键词
信息处理技术/图像编码/矢量量化/CMOSKey words
information processing technology/image coding/vector quantization/CMOS分类
信息技术与安全科学引用本文复制引用
余宁梅,王冬芳,廖裕民,符运强..PDVQ图像压缩芯片的设计与实现[J].通信学报,2009,30(7):91-98,8.基金项目
陕西省自然科学基础研究计划基金资助项目(2006F29) （2006F29）
应用材料创新基金资助项目(XA-AM-200714):陕西省教育厅科学计划基金资助项目(08JK380)The Natural Science Basic Research Plan of Shanxi Province (2006F 29) （XA-AM-200714）
Xi'an Applied Material Innovation Foundation (XA-AM-200714) （XA-AM-200714）
The Special Scientific Research Program of Shanxi Provincial Education Bureau (08JK380) （08JK380）
