半导体学报2009，Vol.30Issue(4)：99-103,5.DOI:10.1088/1674.4926/30/4/045007 EEACC:2220
A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction
A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction
摘要
Abstract
This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer.A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time.An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current.The digital processor can automatically compensate presetting frequency variation with process and temperature,and control the operation of the auxiliary tuning loop.A 1.2 GHz integer-N synthesizer with 1 MHz reference input Was implemented in a 0.18μm process.The measured results demonstrate that the typical settling time of the synthesizer is less than 3μs,and the phase noise is-108 dBc/Hz@1MHz.The reference spur is-52 dBc.关键词
fast-settling/frequency synthesizer/process variation compensation/spur reductionKey words
fast-settling/frequency synthesizer/process variation compensation/spur reduction分类
信息技术与安全科学引用本文复制引用
Yan Xiaozhou,Kuang Xiaofei,Wu Nanjian..A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction[J].半导体学报,2009,30(4):99-103,5.基金项目
Project supported by the Special Funds for State Key Development for Basic Research of China(No.2006CB921201)and the National Natural Science Foundation of China(No.90607007). （No.2006CB921201）
