半导体学报2010，Vol.31Issue(2)：59-63,5.DOI:10.1088/1674-4926/31/2/025007
A 12-bit 40 MS/s pipelined ADC with over 80 dB SFDR
A 12-bit 40 MS/s pipelined ADC with over 80 dB SFDR
Wei Qi 1Yin Xiumei 1Han Dandan 1Yang Huazhong1
作者信息
- 1. Department of Electronic Engineering, Tsinghua University, Beijing 100084, China TNList, Tsinghua UniversitY, Beijing 100084, China
- 折叠
摘要
关键词
analog-to-digital converter/pipeline/spurious free dynamic rangeKey words
analog-to-digital converter/pipeline/spurious free dynamic range引用本文复制引用
Wei Qi,Yin Xiumei,Han Dandan,Yang Huazhong..A 12-bit 40 MS/s pipelined ADC with over 80 dB SFDR[J].半导体学报,2010,31(2):59-63,5.
