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A Novel BIST Approach for Testing Input/Output Buffers in SoCs

Lei Chen Zhi-Ping Wen Zhi-Quan Zhang Min Wang

中国电子科技2009，Vol.7Issue(4)：322-325,4.
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中国电子科技2009，Vol.7Issue(4)：322-325,4.

A Novel BIST Approach for Testing Input/Output Buffers in SoCs

A Novel BIST Approach for Testing Input/Output Buffers in SoCs

Lei Chen 1Zhi-Ping Wen 1Zhi-Quan Zhang 1Min Wang1

作者信息

  • 1. Beijing Microelectronics Technology Institution, Beijing, 100076, China
  • 折叠

摘要

关键词

Built-in self-test/FPGA/I/O buffers/SoCs testing

Key words

Built-in self-test/FPGA/I/O buffers/SoCs testing

引用本文复制引用

Lei Chen,Zhi-Ping Wen,Zhi-Quan Zhang,Min Wang..A Novel BIST Approach for Testing Input/Output Buffers in SoCs[J].中国电子科技,2009,7(4):322-325,4.

基金项目

This work was supported by the 44th China Postdoctoral Science Foundation funded project. （）

中国电子科技

1674-862X

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