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Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)

Chiou-Yng Lee Pramod Kumar Meher Chia-Chen Fan

中国电子科技2009,Vol.7Issue(4):343-347,5.
中国电子科技2009,Vol.7Issue(4):343-347,5.

Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)

Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)

Chiou-Yng Lee 1Pramod Kumar Meher 2Chia-Chen Fan1

作者信息

  • 1. Computer Information and Network Engineering, Lunghwa University of Science and Technology, Taiwan, China
  • 2. Department of Communication Systems, Institute for Infocomm Research, Singapore
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摘要

关键词

Fault tolerant system/finite field/parity prediction

Key words

Fault tolerant system/finite field/parity prediction

引用本文复制引用

Chiou-Yng Lee,Pramod Kumar Meher,Chia-Chen Fan..Fault-Tolerant Bit-Parallel Multiplier for Polynomial Basis of GF(2m)[J].中国电子科技,2009,7(4):343-347,5.

基金项目

This work was supported by the National Science Council of the Republic of China, Taiwan, under Grant No. NSC 98-2221-E-262-007. ()

中国电子科技

1674-862X

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