现代电子技术2011，Vol.34Issue(1)：23-25,28,4.
根升余弦脉冲成形滤波器FPGA实现
FPGA Implementation of Square Root Raised Cosine Pulse Shaping Filter
摘要
Abstract
The FPGA implementation of look-up table arithmetic-based square root raised cosine pulse shaping filter in communication system based on circuit segmentation is proposed, and how to calculate the initialization ROM data of a forming waveform is discussed. On this basis, the VHDL code and the Modelsim simulation results are elucidated. The design method is simple and easy, and is very suitable for high speed forming application.关键词
根升余弦/成形滤波器/查找表/FPGA分类
信息技术与安全科学引用本文复制引用
赵林军..根升余弦脉冲成形滤波器FPGA实现[J].现代电子技术,2011,34(1):23-25,28,4.基金项目
陕西省自动化重点实验室基金(08JZ18)资助 （08JZ18）
陕西省教育厅自然科学研究基金(08JK254)资助 （08JK254）
