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Design and optimization of an ultra-wide frequency range CMOS divide-by-two circuit

Lu Bo Mei Niansong Chen Hu Hong Zhiliang

半导体学报2010,Vol.31Issue(11):122-126,5.
半导体学报2010,Vol.31Issue(11):122-126,5.DOI:10.1088/1674-4926/31/11/115011

Design and optimization of an ultra-wide frequency range CMOS divide-by-two circuit

Design and optimization of an ultra-wide frequency range CMOS divide-by-two circuit

Lu Bo 1Mei Niansong 1Chen Hu 1Hong Zhiliang1

作者信息

  • 1. State Key Laboratory of ASIC and System,Fudan University,Shanghai,201203,China
  • 折叠

摘要

关键词

TFF/DTC/PLL/ultra-wide frequency range/optimization method/in-band phase noise

Key words

TFF/DTC/PLL/ultra-wide frequency range/optimization method/in-band phase noise

引用本文复制引用

Lu Bo,Mei Niansong,Chen Hu,Hong Zhiliang..Design and optimization of an ultra-wide frequency range CMOS divide-by-two circuit[J].半导体学报,2010,31(11):122-126,5.

基金项目

Project supported by the National High Technology Research and Development Program of China(No.SQ2008AA01Z4473469). (No.SQ2008AA01Z4473469)

半导体学报

OA北大核心CSCDCSTPCDEI

1674-4926

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