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An 8-bit 180-kS/s differential SAR ADC with a time-domain comparator and 7.97-ENOB

Fan Hua Wei Qi Kobenge Sekedi Bomeh Yin Xiumei Yang Huazhong

半导体学报2010，Vol.31Issue(9)：118-122,5.

半导体学报2010，Vol.31Issue(9)：118-122,5.DOI:10.1088/1674-4926/31/9/095011

An 8-bit 180-kS/s differential SAR ADC with a time-domain comparator and 7.97-ENOB

Fan Hua ¹Wei Qi ¹Kobenge Sekedi Bomeh ¹Yin Xiumei ¹Yang Huazhong¹

作者信息

1. Division of Circuits and Systems,Department of Electronic Engineering,Tsinghua University,Beijing 100084,China
折叠

摘要

关键词

successive approximation register/time-domain comparator/analog-to-digital converter

Key words

successive approximation register/time-domain comparator/analog-to-digital converter

引用本文复制引用

Fan Hua,Wei Qi,Kobenge Sekedi Bomeh,Yin Xiumei,Yang Huazhong..An 8-bit 180-kS/s differential SAR ADC with a time-domain comparator and 7.97-ENOB[J].半导体学报,2010,31(9):118-122,5.

基金项目

Project supported by the National Natural Science Foundation of China (No.60976032). （No.60976032）

半导体学报

OA北大核心CSCDCSTPCDEI

ISSN：1674-4926

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