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A high performance 90 nm CMOS SAR ADC with hybrid architecture

Tong Xingyuan Chen Jianming Zhu Zhangming Yang Yintang

半导体学报2010，Vol.31Issue(1)：51-57,7.

半导体学报2010，Vol.31Issue(1)：51-57,7.DOI:10.1088/1674-4926/31/1/015002

A high performance 90 nm CMOS SAR ADC with hybrid architecture

Tong Xingyuan ¹Chen Jianming ²Zhu Zhangming ¹Yang Yintang¹

作者信息

1. Institute of Microelectronics,Xidian University,Xi'an 710071,China
2. Corp DS,Semiconductor Manufacturing International Corporation,Shanghai 201203,China
折叠

摘要

关键词

analog-to-digital converter/CMOS integrated circuits/level shifters/multi-supply SoC/high performance

Key words

analog-to-digital converter/CMOS integrated circuits/level shifters/multi-supply SoC/high performance

引用本文复制引用

Tong Xingyuan,Chen Jianming,Zhu Zhangming,Yang Yintang..A high performance 90 nm CMOS SAR ADC with hybrid architecture[J].半导体学报,2010,31(1):51-57,7.

基金项目

Project supported by the National Natural Science Foundation of China (Nos. 60676009, 60725415, 60776034, 60803038) and the National High-Tech Research and Development Program of China (Nos. 2009AA01Z258, 2009AA01Z260). （Nos. 60676009, 60725415, 60776034, 60803038）

半导体学报

OA北大核心CSCDCSTPCDEI

ISSN：1674-4926

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