电子学报2011，Vol.39Issue(2)：358-363,6.
基于行冲突预测的内存控制器QoS管理机制
A QoS Management Mechanism of Memory Controller Based on Row Conflict Prediction
黄侃 1佟冬 1程旭1
作者信息
- 1. 北京大学微处理器研究开发中心,北京,100871
- 折叠
摘要
Abstract
Traditional QoS managemnt mechanism of memory controller cannot effectively control the latency of processor accesses. To solve this problem,this paper proposes the PROC mechanism. Based on the prediction of the future processor accesses,PRCC analyzes the impact of device accesses on the latency of processor accesses,and prevents issuing the accesses that will result in that processor accesses change from mw bits to row conflicts, so PRCC can reduce the impact of device accesses on the latency of proccesor accesses. The evaluation results for PKUnity-3(SK) SoC show that after applying PROC service,the impact of device accesses on program execution time is reduced from 24％ to 8％. By parameter adjustment, PROC achieves better performance trade-offs between processor and devices than traditional methods.关键词
内存控制器/访存调度/系统级芯片/服务质量Key words
DRAM/ memory access scheduling/ system-on-chip/ quality of sevice分类
信息技术与安全科学引用本文复制引用
黄侃,佟冬,程旭..基于行冲突预测的内存控制器QoS管理机制[J].电子学报,2011,39(2):358-363,6.
