控制理论与应用2011，Vol.28Issue(3)：433-437,5.
高阶电荷泵锁相环环路滤波器的设计
Design of loop filter for high order charge-pump phase-locked loops
摘要
Abstract
Considering the characteristics of discrete-time sampling for charge-pump phase-locked ioops(CPPLLs), we propose a blocking design method for loop filter in high order CPPLLs. By this method, the CPPLL of any optional order and type can be derived, and phase jitters can be eliminated. Also, high frequency step input or ramp input can be tracked. By analyzing the stability and characteristics of CPPLLs, the range of the candidate loop parameters can be determined, from which the obtained CPPLLs of n-th order and n type are superior to others. Effectiveness of the design method and correctness of the analysis method are validated by the simulations of two types of CPPLLs. The proposed method provides an important reference and guideline for the design of high order CPPLLs Loop filters.关键词
电荷泵锁相环/环路滤波器/稳定性/相位抖动Key words
CPPLL/ loop filter/ stability/ phase jitter分类
信息技术与安全科学引用本文复制引用
赵益波,冯久超..高阶电荷泵锁相环环路滤波器的设计[J].控制理论与应用,2011,28(3):433-437,5.基金项目
国家自然科学基金资助项目(60872123) （60872123）
国家自然科学基金-广东省自然科学基金联合基金资助项目(U0835001) （U0835001）
华南理工大学优秀博士论文创新基金资助项目(200913005). （200913005）
