电子学报2011，Vol.39Issue(5)：1169-1173,5.
一种用于FPGA配置的抗干扰维持电路
Antijamming Holding Circuit for FPGA Configuration Cell
摘要
Abstract
An antijamming holding circuit is proposed to solve the problem with data losing under the noise in the SRAMbased FPGA configurafion cell. When the structure parameters of the area efficient configuration cell designed, the Static Noise Margin(SNM) of configuration cell increases as the power supply voltage increases. Through the detailed design of the voltage reference,charge inmr mp and voltage comparation circuit,we realized a feedback controlled steady power supply for FPGA configuration cell. Simulation and testing results show,an FPGA with the new structure can hold data in configuration cell under the 1.8V voltage while its normal voltage supply is 2.5V,which improve the antijamming performance of FPGA.关键词
可编程门阵列/静态存储器/低压维持/抗干扰/噪声容限Key words
field programmable gate array (FPGA)/static random access memory (SRAM)/low voltage holding circuit/antijamming/ signal noise margin分类
信息技术与安全科学引用本文复制引用
张惠国,王晓玲,唐玉兰,于宗光,王国章..一种用于FPGA配置的抗干扰维持电路[J].电子学报,2011,39(5):1169-1173,5.基金项目
江苏省自然科学基金(No.BK2007026) （No.BK2007026）
广东省产学研合作引导项目(No.2009B090300416) （No.2009B090300416）
