现代电子技术2011，Vol.34Issue(12)：180-182,3.
一种全集成型CMOS LDO线性稳压器设计
Design of Fully Integrated CMOS Low Dropout Regulator
胡爱飞 1王宏伟 2潘理平1
作者信息
- 1. 南京机电职业技术学院,江苏南京211135
- 2. 中航南京机电液压工程研究中心,江苏南京211106
- 折叠
摘要
Abstract
A fully integrated low dropout regulator ( LDO) with low power consumption was designed on the basis of 0. 25 μm CMOS process. A zero is introduced at the output end of LDO by the RC feedback network to cancel out one of the output poles. Therefore, targe capacitors or complicate compensation circuits are avoided, and the chip area is reduced. This method is simple, less chip area occupation, and capacitorless. The simulation results show that with output current from 1 mA to 100 mA, the phase margin is above 40°, and the overshoot of transient response is less than 20 mV variation. The power supply rejection ratio (PSRR) is about 76 dB. The sum of quiescent current (without load) of LDO and bandgap voltage source is 390 μA.关键词
线性稳压电路/频率补偿/频率稳定性/瞬态响应Key words
low dropout regulator/ frequency compensation/ frequency stability/ transient response分类
信息技术与安全科学引用本文复制引用
胡爱飞,王宏伟,潘理平..一种全集成型CMOS LDO线性稳压器设计[J].现代电子技术,2011,34(12):180-182,3.
