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首页|期刊导航|半导体学报|An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process

An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process

Liu Ming Chen Hong Li Changmeng Wang Zhihua

半导体学报2010,Vol.31Issue(6):144-147,4.
半导体学报2010,Vol.31Issue(6):144-147,4.DOI:10.1088/1674-4926/31/6/065013

An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process

An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process

Liu Ming 1Chen Hong 1Li Changmeng 1Wang Zhihua1

作者信息

  • 1. Tsinghua National Laboratory for Information Science and Technology, Institute of Microelectronics, Tsinghua University,Beijing 100084, China
  • 折叠

摘要

关键词

sub-threshold SRAM/11T SRAM cell/ultra-low-power SoC

Key words

sub-threshold SRAM/11T SRAM cell/ultra-low-power SoC

引用本文复制引用

Liu Ming,Chen Hong,Li Changmeng,Wang Zhihua..An ultra-low-power 1 kb sub-threshold SRAM in the 180 nm CMOS process[J].半导体学报,2010,31(6):144-147,4.

基金项目

Project supported by the National Natural Science Foundation of China (No. 60906010). (No. 60906010)

半导体学报

OA北大核心CSCDCSTPCDEI

1674-4926

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