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高性能处理系统的软硬件协同设计研究

谢菲 张浩

计算机工程与科学2009,Vol.31Issue(z1):20-23,4.
计算机工程与科学2009,Vol.31Issue(z1):20-23,4.DOI:10.3969/j.issn.1007-130X.2009.A1.007

高性能处理系统的软硬件协同设计研究

Hardware & Software Co-Design for High Performance System

谢菲 1张浩1

作者信息

  • 1. 中国科学院计算技术研究所前瞻研究实验室,北京,100190
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摘要

Abstract

x86 is the most widely used ISA currently, but compared with RISC,is very complex. The obstacles in designing an x86 processing systems (most of them are uncommon characters) need lots of additional hardware resources, and supporting directly with hardware does no good for the utilization of hardware resources. This paper analyzes the characters of x86 ISA and applications deeply, and propose a software/hardware co-design method based on RISC superscalar processing systems. The area of our co-design processing system is about 78.3% of an x86 processing system with hardware decoder, but performance of our design is about 90.6% of the same processing system with hardware decoder.

关键词

协同设计/超标量/执行模式/热点识别

Key words

co-design/superscalar/execution mode/hot trace recognition

分类

信息技术与安全科学

引用本文复制引用

谢菲,张浩..高性能处理系统的软硬件协同设计研究[J].计算机工程与科学,2009,31(z1):20-23,4.

计算机工程与科学

OA北大核心CSCDCSTPCD

1007-130X

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