现代雷达2009，Vol.31Issue(11)：72-76,5.
基于FPGA的雷达数字接收机设计与实现
Design and Implementation of a Digital Radar Receiver Based on FPGA
冯振伟 1武小冬 2游思理 2梅顺良2
作者信息
- 1. 清华大学电子工程系,北京,100084
- 2. 北京雷音电子技术开发有限公司,北京,100070
- 折叠
摘要
Abstract
Higher performance is required for a receiver of modem radar system. Digital receiver technology is an effective imple-mentation method of high accuracy and wide band radar receiving systems. The theory and technology of digital receiver are intro-duced in this paper. The digital down conversion, Number Controlled Oscillator (NCO), Cascade integrator comb (CIC) filter and decimation are discussed. An example for implementing a digital receiver based on FPGA is presented. The analysis and simu-lation are made and the test results are provided.关键词
数字接收机/现场可编程门阵列/数字下变频/数控振荡器/级联积分梳状滤波器Key words
digital receiver/ FPGA/ digital down conversion/ NCO/ CIC filter分类
信息技术与安全科学引用本文复制引用
冯振伟,武小冬,游思理,梅顺良..基于FPGA的雷达数字接收机设计与实现[J].现代雷达,2009,31(11):72-76,5.
