单片机与嵌入式系统应用2011，Vol.11Issue(4)：7-9,3.
Avalon总线SHT11的自定义IP核的开发
Development of SHT11 Customized IP Core Based on Avalon Bus
摘要
Abstract
This article briefly describes the SOPC and Avalon bus. The development process of the SHT11 customized IP core is introduced. This IP core adopts the nested state machine according to the device controiler specification and the timing request, then an embedded system on chip based on NiosII is built. CPU reads and writes SHT11 through the IP core. In the greenhouse of agriculture, the system accuracy is verified. The customized IP core can shorten the development cycle and reduce the workload when other users use SHT11 in the development.关键词
SOPC/FPGA/IP核/SHT11/Avalon总线/NiosⅡKey words
SOPC/ FPGA/ IP core/ SHT11/ Avalon bus/ NiosII分类
计算机与自动化引用本文复制引用
隋会静,杨永杰..Avalon总线SHT11的自定义IP核的开发[J].单片机与嵌入式系统应用,2011,11(4):7-9,3.基金项目
国家中小企业创业基金(09C26213103647) （09C26213103647）
南通市基金项目(K200804、AL2009020、AA2008017、2009-03). （K200804、AL2009020、AA2008017、2009-03）
