现代电子技术2011，Vol.34Issue(13)：49-52,4.
基于FPGA的PCM30/32路系统信号同步数字复接设计
Design of Signal Synchronous Digital Multiplexing for PCM30/32-channel System Based on FPGA
张华伟 1宗瑞良1
作者信息
- 1. 西北工业大学电子信息学院，陕西西安 710129
- 折叠
摘要
Abstract
In modern digital communication systems, multiplexing technology is extensively employed, so as to increase transmission efficiency by augmenting channel capacity. On the basis of analysis of primary group signal frame structure of PCM30/32-channel system, a FPGA based synchronous digital multiplexing system is designed, which takes EDA composite simulation design software Quartus II 8. 0 as the development platform and performs modeling with Verilog HDL. Through simulations and analyses on functionality and routing, the correctness of the logic relationship between inputs and outputs is verified. The designed system is robust and implements the design requirements of multiplexing and demultiplexing signals synchronously at the transmitting end and the receiving end respectively.关键词
FPGA；数字通信；数字复接；帧同步Key words
FPGA/ digital communication) digital multiplexing/ frame synchronization分类
信息技术与安全科学引用本文复制引用
张华伟,宗瑞良..基于FPGA的PCM30/32路系统信号同步数字复接设计[J].现代电子技术,2011,34(13):49-52,4.
