计算机工程2011,Vol.37Issue(15):249-251,3.DOI:10.3969/j.issn.1000-3428.2011.15.081
数据并行计算机体系结构研究
Research on Data Parallel Computer Architecture
王鹏飞 1张发存 1段敬红1
作者信息
- 1. 西安理工大学计算机科学与工程学院,西安,710048
- 折叠
摘要
Abstract
By the analysis of the architectures of parallel computer, an embedded data parallel computer architecture model is proposed for multimedia processing applications. The limitations of high communication complexity and weak adaptability of the conventional PIM architectures is bridged by this model combined the PIM technology with the reconfigurable bus. The main components and the instruction set are described in detail. A typical algorithm example is given to show the composition of assembly language program and the process of parallel computation.关键词
PIM技术/数据并行体系结构/可重构总线/处理元阵列/指令集体系结构Key words
PIM technology/data parallel architecture/reconfigurable bus/Processing Element(PE) array/instruction set architecture分类
自科综合引用本文复制引用
王鹏飞,张发存,段敬红..数据并行计算机体系结构研究[J].计算机工程,2011,37(15):249-251,3.