计算机工程与应用2011，Vol.47Issue(25)：220-223,4.DOI:10.3778/j.issn.1002-8331.2011.25.058
基于CUDA架构的三维CPML-FDTD并行方法
Three dimensional CPML-FDTD parallel algorithm based on CUDA
摘要
Abstract
Finite Difference Time Domain(FDTD) algorithm costs much time in simulating the electrical-large object.To overcome the drawback, a three-dimensional parallel FDTD algorithm based on Computer Unified Device Architecture (CUD A) is implemented, where the parallel property of FDTD and General Purpose Graphics Processing Units (GPGPU) technique are utilized effectively, and the Convolutionary Perfectly Matched Layer (CPML) absorbing boundary is adopted. Combining the property of FDTD and CUDA.the algorithm is further optimized.Compared with the performance of CPU in the corresponding period, the proposed algorithm is precise and high-speed.The accelerating ratio can reach 10 before optimization and more than 25 after optimization when there are more than 100 thousand Yee cells in simulation field, which shows that the algorithm is fit to simulate electrical-large object.关键词
关键词:时域有限差分(FDTD)/并行计算/时城卷积完全匹配层(CPML)/基于计算统一设备架构(CUDA)/通用图形处理器(GPGPU)/加速Key words
Finite Difference Time Domain (FDTD)/ parallel computing/ Convolutionary Perfectly Matched Layer (CPML)/ Computer Unified Device Architecture(CUDA)/ General Purpose Graphics Processing Units (GPGPU)/ acceleration分类
信息技术与安全科学引用本文复制引用
胡媛,李康,孔凡敏,杜刘革..基于CUDA架构的三维CPML-FDTD并行方法[J].计算机工程与应用,2011,47(25):220-223,4.基金项目
国家重点基础研究发展计划课题(973)(the National Grand Fundamental Research 973 Program of China under Grant No.2009CB930503,No.2009CB930501,No.2007CB613203) （973）
山东省优秀中青年科学家科研奖励基金(No.BS2009NJ002). （No.BS2009NJ002）
