半导体学报2011，Vol.32Issue(9)：125-132,8.DOI:10.1088/1674-4926/32/9/095009
An improved single-loop sigma-delta modulator for GSM applications
An improved single-loop sigma-delta modulator for GSM applications
摘要
Abstract
Traditional feedforward structures suffer from performance constraints caused by the complex adder before quantizer.This paper presents an improved 4th-order l-bit sigma-delta modulator which has a simple adder and delayed input feedforward to relax timing constraints and implement low-distortion.The modulator was fabricated in a 0.35μm CMOS process,and it achieved 92.8 dB SNDR and 101 dB DR with a signal bandwidth of 100 kHz dissipating 8.6 mW power from a 3.3-V supply.The performance satisfies the requirements of a GSM system.关键词
sigma-delta modulator/ low-distortion/ CDS/ switched-capacitor circuit/ delayed input feedforwardKey words
sigma-delta modulator/ low-distortion/ CDS/ switched-capacitor circuit/ delayed input feedforward引用本文复制引用
Li Hongyi,Wang Yuan,Jia Song,Zhang Xing..An improved single-loop sigma-delta modulator for GSM applications[J].半导体学报,2011,32(9):125-132,8.基金项目
Project supported by the National Science Fund for Distinguished Young Scholars of China (No.60925015). （No.60925015）
