半导体学报2011，Vol.32Issue(9)：133-139,7.DOI:10.1088/1674-4926/32/9/095010
An ultra high-speed 8-bit timing interleave folding & interpolating analog-to-digital converter with digital foreground calibration technology
An ultra high-speed 8-bit timing interleave folding & interpolating analog-to-digital converter with digital foreground calibration technology
Zhang Zhengping 1Wang Yonglu 2Huang Xingfa 2Shen Xiaofeng 2Zhu Can 2Zhang Lei 1Yu Jinshan 2Zhang Ruitao2
作者信息
- 1. No.24 Research Institute, China Electronics Technology Group Corporation, Chongqing 400060, China
- 2. Science and Technology on Analog Integrated Circuit Laboratory, Chongqing 400060, China
- 折叠
摘要
Abstract
A 2-Gsample/s 8-b analog-to-digital converter in 0.35μm BiCMOS process technology is presented.The ADC uses the unique folding and interpolating algorithm and dual-channel timing interleave multiplexing technology to achieve a sampling rate of 2 GSPS.Digital calibration technology is used for the offset and gain corrections of the S/H circuit,the offset correction of preamplifier,and the gain and clock phase corrections between channels.As a result of testing,the ADC achieves 7.32 ENOB at an analog input of 484 MHz and 7.1 ENOB at Nyquist input after the chip is self-corrected.关键词
ultra high-speed/ interpolation algorithm/ folding/ analog-to-digital converterKey words
ultra high-speed/ interpolation algorithm/ folding/ analog-to-digital converter引用本文复制引用
Zhang Zhengping,Wang Yonglu,Huang Xingfa,Shen Xiaofeng,Zhu Can,Zhang Lei,Yu Jinshan,Zhang Ruitao..An ultra high-speed 8-bit timing interleave folding & interpolating analog-to-digital converter with digital foreground calibration technology[J].半导体学报,2011,32(9):133-139,7.
