计算机与数字工程2011，Vol.39Issue(10)：60-63,211,5.
芯片层次化物理设计中的时序预算及时序收敛
Timing Budgeting and Timing Closure in Hierarchical Physical Design for ASICs
摘要
Abstract
This paper proposed a method of physical-aware timing budgeting and timing closure for hierarchical physical design of deep sub-micron ASICs. Timing closure is one of the biggest challenges in physical design, and the wire delay is a key point in timing closure. This method considered multiple influencing factor which impact the timing budgeting and timing closure. It is already applied on several chips in 45nm and 65nm technology, it can help to achieve rapid timing closure.关键词
层次化物理设计/物理感知时序预算/时序收敛Key words
hierarchical physical design, physical-aware timing budgeting, timing closure分类
信息技术与安全科学引用本文复制引用
杨磊,孙丰刚,柳平增,孙赛赛..芯片层次化物理设计中的时序预算及时序收敛[J].计算机与数字工程,2011,39(10):60-63,211,5.基金项目
教育部科学技术研究重点项目(编号:210126)资助. （编号:210126）
