电子器件2011，Vol.34Issue(5)：517-520,4.DOI:10.3969/j.issn.1005-9490.2011.05.009
一种低功耗2.4GHz低噪声放大器设计
Design of a Low Power 2.4 GHz LNA
摘要
Abstract
A 2.4 GHz CMOS low noise,low consumed power amplifier was designed,and the theories of the noise matching was presented. This amplifier was comprised of the classical cascade structure and the capacitor Cex added between the gate and the input source of MOSFET in order to meet the conjugated matching and noise matching simultaneously. The circuit is implemented with the SMIC 65 nm CMOS technology and simulated by Cadence. The results show that the consumed power is less than 7 mW under the 1.2 V supply,noise figure is less than 0.7 dB and the gain is larger than 21 dB. It is unconditionally stable. The whole layout occupies 0. 57 mm×0. 65 mm.关键词
CMOS/低噪声放大器/噪声匹配/低功耗Key words
CMOS/LNA/noise matching/low power分类
信息技术与安全科学引用本文复制引用
翁寅飞,孙玲玲,高海军,林隆乾..一种低功耗2.4GHz低噪声放大器设计[J].电子器件,2011,34(5):517-520,4.基金项目
基于传输线频率选择器的CMOS硅基毫米波压控振荡器研究(KYZ043710033) （KYZ043710033）
