北京大学学报：自然科学版2011，Vol.47Issue(5)：783-788,6.
高灵敏度GPS接收机载波跟踪环路的设计优化与实现
Design Optimization and Implementation of Carrier Tracking Loop for High Sensitivity GPS Receivers
武玲娟 1崔莹莹 1路卫军 1于敦山1
作者信息
- 1. 北京大学信息科学技术学院微电子学系,北京100871
- 折叠
摘要
Abstract
This paper presents the design,optimization and implementation of GPS carrier tracking loop based on high sensitivity GPS base band signal processor research topic.The phase detector,loop error sources and loop parameters are first optimized to improve the tracking sensitivity and then the phase lock loop assisted by frequency lock loop circuit structure is applied.The circuit is optimized and timing-sharing technology is used for the modules including several multipliers and dividers to reduce resource consumption and save chip area.The authors implement the designed GPS carrier tracking loop in Verilog and complete the logic and functional simulation in Modelsim with RTL level code.The FPGA board verification platform is established and the performance test is carried out using GPS L1 band signal source.The test result shows that the tracking sensitivity can reach 25 dB-Hz and chip area of the single channel carrier tracking loop is 425555 μm2 in SMIC 0.18 μm technology using Design Complier.关键词
全球定位系统（GPS）/高灵敏度/载波跟踪/锁相环（PLL）/锁频环（FLL）Key words
GPS/high sensitivity/carrier tracking/PLL/FLL分类
天文与地球科学引用本文复制引用
武玲娟,崔莹莹,路卫军,于敦山..高灵敏度GPS接收机载波跟踪环路的设计优化与实现[J].北京大学学报：自然科学版,2011,47(5):783-788,6.
