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FPGA的双缓冲模式PCI Express总线设计

朱伟杰 陆探 朱万经

单片机与嵌入式系统应用2011,Vol.11Issue(11):22-25,4.
单片机与嵌入式系统应用2011,Vol.11Issue(11):22-25,4.

FPGA的双缓冲模式PCI Express总线设计

Double Buffering POl Express Interface Based on FPGA

朱伟杰 1陆探 1朱万经1

作者信息

  • 1. 电子科技大学电子工程学院,成都611731
  • 折叠

摘要

Abstract

This article introduces the design and implementation of double buffering PCI Express interface based on FPGA, which is ap plied in software-defined radio (SDR) system. A universal SDR platform based on Xilinx Virtex 6 FPGA is designed, and tbe device driver in Linux system and the DMA controller based on Xilinx PCIE core are developed. Double buffering increases the data transfer speed and saves the hardware resource. The test results show that our system works .stably and reliably, and the read and write speed a chieves 402 MB/s.

关键词

双缓冲/DMA控制器/PCI/Express/FPGA

Key words

double buffering/DMA controller/PCI Express/FPGA

分类

信息技术与安全科学

引用本文复制引用

朱伟杰,陆探,朱万经..FPGA的双缓冲模式PCI Express总线设计[J].单片机与嵌入式系统应用,2011,11(11):22-25,4.

单片机与嵌入式系统应用

OACSTPCD

1009-623X

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