国防科技大学学报2011，Vol.33Issue(6)：24-30,7.
ET:一种能耗有效的高性能嵌入式处理器
ET: An Energy-efficient Processor Architecture for Embedded Tera-scale Computing
摘要
Abstract
As criterions and algorithms evolve and become molt complex,high performance embedded application demands the high performance and energy efficiency.The challenge,however,is how to turn the VLSI capability into the actual computing performance.This research proposed an energy efficient processor architecture named ET(Embedded Tera-scale Computing),which is composed of many lightweight VLIW processor cores.Also named small COILS.Each core executes a thread witll the mechanisms for explicitly managing the data and instructions.ET uses a hierarchical data registers to reduce the cost of delivering data,and the asymmetric and distributed instruction registers to deliver the instructions.In order to further reduce the energy,ET employs non-deep pipeline and simple control flow and optimizes the execution of loop body of applications.The primary result shows that ET Can achieve the 1TOPS performance and the 100GOPS/W efficiency when scaled to 40nm.关键词
嵌入式计算/能耗有效/层次化寄存器文件Key words
embedded computing/energy-efficient/hierarchy register file分类
信息技术与安全科学引用本文复制引用
杨乾明,伍楠,管茂林,张春元,全巍,黄达飞..ET:一种能耗有效的高性能嵌入式处理器[J].国防科技大学学报,2011,33(6):24-30,7.基金项目
国家自然科学基金资助项目(61033008,60903041) （61033008,60903041）
博士点基金资助项目(20104307110002) （20104307110002）
