中北大学学报（自然科学版）2011，Vol.32Issue(6)：763-767,5.DOI:10.3969/j.issn.1673-3193.2011.06.021
基于DSP的H.264解码器优化设计
Optimal Design of DSP-Based H.264 Decoder
摘要
Abstract
The embedded system suffers from the limitation of computing power and corresponding resources. Based on a general digital signal processor (DSP), two kinds of optimization techniques were proposed to enhance the performance of H. 264 decoder. One was to transfer data of reference frame via DMA with a novel approach, which could increase the throughputs of external bus and strengthen computing power. The other was resorted to the block-based de-blocking filter, which not only minimized the times of external memory access, but also improved efficiency of DSP core. The experimental results show that the proposed solution improves the H. 264 decoding speed by almost 60%. The optimized H. 264 decoder can achieve the CIF @30 Hz video decoding on a Blackfin 533 processor operating at 526 MHz,which fully meets the requirement of real-time decoding.关键词
H.264/解码器/优化/运动补偿/环路滤波Key words
H. 264/ decoder/ optimization/ MC/ in-loop filter分类
信息技术与安全科学引用本文复制引用
胡宏华,谌德荣..基于DSP的H.264解码器优化设计[J].中北大学学报（自然科学版）,2011,32(6):763-767,5.
