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一种4bit相位量化ADC电路分析

邹振杰 陈明辉 曲明

无线电通信技术2011,Vol.37Issue(6):40-42,49,4.
无线电通信技术2011,Vol.37Issue(6):40-42,49,4.

一种4bit相位量化ADC电路分析

Study on a 4-bit Phase Quantization ADC Circuit

邹振杰 1陈明辉 1曲明1

作者信息

  • 1. 中国电子科技集团公司第五十四研究所,河北石家庄050081
  • 折叠

摘要

Abstract

The paper discusses and analyzes the difference between and the advantages of the various quantization modes of digital radio frequency memory (DRFM), and introduces the architecture of a 4-bit phase quantization ADC. An implementation scheme of the main circuit modules of phase quantization ADC is presented and compared with the traditional method. Based on 0.13 um CMOS technology, the simulation indicates that this circuit can accomplish sampling and quantization at 1.2 GHz clock rate, the IBW is 250MHz, the phase accuracy is 0. 2LSB.

关键词

数字射频存储器/相位量化ADC/比较器

Key words

digital radio frequency memory/phase quantization ADC/comparator

分类

信息技术与安全科学

引用本文复制引用

邹振杰,陈明辉,曲明..一种4bit相位量化ADC电路分析[J].无线电通信技术,2011,37(6):40-42,49,4.

无线电通信技术

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