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一种基于FPGA的雷达数字信号处理机设计与实现

霍志 谢启友 郭靖 刁节涛

现代电子技术2012,Vol.35Issue(1):13-16,4.
现代电子技术2012,Vol.35Issue(1):13-16,4.

一种基于FPGA的雷达数字信号处理机设计与实现

Design and implementation of radar digital signal processor based on FPGA

霍志 1谢启友 2郭靖 1刁节涛1

作者信息

  • 1. 国防科学技术大学嵌入式系统与固态存储工程研究中心,湖南长沙410073
  • 2. 武警湖北总队鄂州市支队,湖北鄂州436000
  • 折叠

摘要

Abstract

Based on engineering project of radar seeker and the principle of digital signal processor, a blue print including DBF technology is proposed to match the requirement of the project. The hardware design was accomplished. Xilinx Virtex4 SX55 FPGA was selected as the key instrument. The design of baseband signal generation module, the echo signal acquisition module, the control signal generation module and the clock circuit are deeply introduced. The digital radar signal processor was tested in dark house. The results show that the performance of the design matches the requirement of the radar signal processor.

关键词

数字信号处理机/FPGA/DBF/基频信号/回波信号

Key words

digital signal processor/ FPGA/ DBF/ baseband signal/ echo signal

分类

信息技术与安全科学

引用本文复制引用

霍志,谢启友,郭靖,刁节涛..一种基于FPGA的雷达数字信号处理机设计与实现[J].现代电子技术,2012,35(1):13-16,4.

现代电子技术

OACSTPCD

1004-373X

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