现代电子技术2012，Vol.35Issue(6)：22-24,3.
基于MCU的锁相环锁定时间测量系统设计
Design for measurement system of PLL lock time based on MCU
胡天琨 1叶建芳1
作者信息
- 1. 东华大学信息与科学技术学院,上海210620
- 折叠
摘要
Abstract
A universal measurement system was design by comparing the interface characteristics of each PLL chip to measure the lock time of PLL. This system includes the softwares for both upper computers and lower computers, and control circuit based on AT89C51. The serial port communication is adopted for upper computers and lower computers. The generality and real-time performance are the primary features of this system to guarantee the compatibility of most common PLL chips in the design of softwares and hardwares. This system can control PLL and measure lock time of it timely according to the control parameter which is input by users. The actual application demonstrates that this system can not only measure the lock time of PLL precisely, but also reduce the work load and complexity during the design and debugging of PLL.关键词
AT89C51/锁相环/锁定时间/串口Key words
AT89C51/PLL/lock time/serial port分类
信息技术与安全科学引用本文复制引用
胡天琨,叶建芳..基于MCU的锁相环锁定时间测量系统设计[J].现代电子技术,2012,35(6):22-24,3.
