浙江大学学报（理学版）2012，Vol.39Issue(1)：112-116,5.DOI:10.3785/j.issn.1008-9497.2012.01.023
基于FPGA的WIMAX LDPC码编译码器的设计
Design of WIMAX LDPC codec based on FPGA
摘要
Abstract
An encoder architecture suitable for all the code rate and code length LDPC in the WIMAX standard is proposed, which takes fully use of the characteristics of the parity matrix to reduce the hardware implementation complexity. A reconfigurable LDPC decoder which is based on TDMP-NMS algorithm and supports continuous decoding is designed. It can decode LDPC of any code rate and code length in the standard. The optimum quantitative bit width and normalization factor are found out by simulation. A new dynamic iteration stopping criterion which is suitable for TDMP based decoding algorithm is adopted. Result shows that the scheme proposed not only decreases the resource consumed but also increases the throughput of the decoder effectively.关键词
WIMAX/LDPC码编译码器/TDMP-NMS/现场可编程逻辑门阵列Key words
WIMAX/ LDPC codec/ TDMP-NMS/ FPGA分类
信息技术与安全科学引用本文复制引用
王秀敏,沈建明,张洋,付娟..基于FPGA的WIMAX LDPC码编译码器的设计[J].浙江大学学报（理学版）,2012,39(1):112-116,5.基金项目
2009年国家质检总局科技计划项目(2009QK027) （2009QK027）
2010年浙江省科技计划优先主题重点工业项目(2010C11024) （2010C11024）
2010年杭州经济技术开发区产学研合作项目(201002). （201002）
