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Robust and low power register file in 65 nm technology

Zhang Xingxing Zeng Xiaoyang Li Yi Xiong Baoyu Han Jun Zhang Yuejun Dong Fangyuan Zhang Zhang Yu Zhiyi Cheng Xu

半导体学报2012，Vol.33Issue(3)：109-113,5.

半导体学报2012，Vol.33Issue(3)：109-113,5.DOI:10.1088/1674-4926/33/3/035010

Robust and low power register file in 65 nm technology

Zhang Xingxing ¹Zeng Xiaoyang ¹Li Yi ¹Xiong Baoyu ¹Han Jun ¹Zhang Yuejun ²Dong Fangyuan ¹Zhang Zhang ³Yu Zhiyi ¹Cheng Xu¹

作者信息

1. State Key Laboratory of ASIC and System, Fudan University, Shanghai 201203, China
2. Institute of Circuits and Systems, Ningbo University, Ningbo 315211, China
3. School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei 230009, China
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摘要

Abstract

A register file (RF) with 32 × 32 capacity and 4-read 2-write (4R2W) ports is presented and analyzed in detail.A new output structure using a MUX and a latch is proposed.It eliminates any dynamic or analog circuit in the read path,and thus it can improve robustness and reduce power at the same time.We also simplify the timing sequence due to the output scheme.The simplified timing circuit not only cuts down the power but also improves the robustness.In addition,less power is achieved when successive read of“0” or “1” is performed.The RF has been fabricated in TSMC 65 nm technology,and the chip test demonstrates that it can operate at 0.8 GHz,consuming 7.2 mW at 1.2 V.

关键词

register file/65 nm/robust/low power/multi-port

Key words

register file/65 nm/robust/low power/multi-port

引用本文复制引用

Zhang Xingxing,Zeng Xiaoyang,Li Yi,Xiong Baoyu,Han Jun,Zhang Yuejun,Dong Fangyuan,Zhang Zhang,Yu Zhiyi,Cheng Xu..Robust and low power register file in 65 nm technology[J].半导体学报,2012,33(3):109-113,5.

基金项目

Project supported by the National Significant Science and Technology Projects (No.01-Special-2010ZX01030-001-001-03). （No.01-Special-2010ZX01030-001-001-03）

半导体学报

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ISSN：1674-4926

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