计算机工程2012,Vol.38Issue(7):253-256,4.DOI:10.3969/j.issn.1000-3428.2012.07.083
一种静态LoC关键性预测器设计
Design of Static LoC Key Predictor
李清波 1苟鹏飞 1孙骏 2杨兵 1王进祥1
作者信息
- 1. 哈尔滨工业大学微电子中心,哈尔滨150001
- 2. 上海航天控制工程研究所,上海200072
- 折叠
摘要
Abstract
Aiming at instruction Likelihood of Criticality(LoC) of SPEC2000 programs under different clustered superscalar processor architectures, this paper proposes a design of static LoC key predictor. It discusses the instruction LoC, and finds that it has some characteristics, such as architecture-independent and dynamic-invariable. This paper uses this characteristics above to design the predictor. Simulation results show that when 1×8 cluster super-scalar processor uses the design, the program Instruction per Clock(IPC) average increases by 5.3%, and the performance is better than the dynamic LoC predictors.关键词
超标量处理器/结构无关性/动态不变性/静态预测/指令调度Key words
superscalar processor/ structure independence/ dynamic invariability/ static prediction/ instruction schedule分类
信息技术与安全科学引用本文复制引用
李清波,苟鹏飞,孙骏,杨兵,王进祥..一种静态LoC关键性预测器设计[J].计算机工程,2012,38(7):253-256,4.