计算机技术与发展2012，Vol.22Issue(6)：217-220,4.
基于FPGA的高速数据采集系统的设计与实现
Design of High-speed Data Acquisition System Based on FPGA
摘要
Abstract
To solve the problem of large volumes of data,real-time,transfer rate and other issues in the high-speed data collection process,present a FPGA-based high-speed data acquisition system implementations. The project is as a master chip with FPGA,it is used to implement analog signal path control, A/D conversion control,DDRII SDRAM data cache,PCI bus transfers data four main functions. System uses the Venlog HDL language and Quartus D 6. 0 software program to achieve control of IP cores, achieving multiple ADC08B200 chip data acquisition, through the DDRII SDRAM for data caching, data transfer through the PCI bus to a PC. After the PC test system software can be a good high-speed data acquisition system to complete the task requirements.关键词
FPGA/DDRⅡ SDRAM/PCI总线/数据采集系统Key words
FPGA/DDRII SDRAM/PCI bus/data acquisition system分类
信息技术与安全科学引用本文复制引用
肖积涛,马幼鸣,周鸣争,周明龙..基于FPGA的高速数据采集系统的设计与实现[J].计算机技术与发展,2012,22(6):217-220,4.基金项目
安徽省自然科学基金(KJ2007A046) （KJ2007A046）
