半导体学报（英文版）2012，Vol.33Issue(5)：120-125,6.DOI:10.1088/1674-4926/33/5/055006
A low power flexible PGA for software defined radio systems
A low power flexible PGA for software defined radio systems
摘要
Abstract
This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier (PGA).The PGA consists of three-stage amplifiers,which includes a variable gain amplifier and DC offset cancellation circuits.The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz.The chip was fabricated in 0.13 μm CMOS technology.Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB.At the gain setting of 60 dB,the bandwidth can be tuned from 1 to 10 MHz,while the power consumption can be programmed from 850 μA to 3.2 mA at a supply voltage of 1.2 V.Its in-band OIP3 result is at 14 dBm.关键词
low power/ DC offset/ programmable gain amplifier/ sofware defined radioKey words
low power/ DC offset/ programmable gain amplifier/ sofware defined radio引用本文复制引用
Li Guofeng,Wu Nanjian..A low power flexible PGA for software defined radio systems[J].半导体学报（英文版）,2012,33(5):120-125,6.基金项目
Project supported by the National High-Tech Research and Development Program of China (No.2009AA011606) and the National Natural Science Foundation of China (No.60976023). （No.2009AA011606）
